深圳市益辉科技有限公司 (非本站正式会员)

深圳市益辉科技有限公司

营业执照:未审核经营模式:经销商所在地区:广东 深圳企业网站:
http://www.yihuidzic.com/

收藏本公司 人气:536424

联系方式

  • 地址:深圳市深南中路3039号国际文化大厦1627
  • 联系人:叶欣
  • 电话:0755-83031949
  • 传真:0755-83689445
  • 手机:13590108836
  • QQ: QQ:2851397780 
  • E-mail:2851397780@qq.com

供应EP2S90F1020C5N,原装EP2S90F1020C5N

  • 供应EP2S90F1020C5N,原装EP2S90F1020C5N
产品价格:
-/ 1pcs
-/ 10pcs
-/ 100pcs
厂 家:
ALTERA
封 装:
BGA
批 号:
06+
数 量:
2500
 
点此询价

产品咨询直线:0755-83031949

产品详细说明

EP2S90F1020C5N技术/目录信息
  供应商Altera
  类别集成电路(ic)
数逻辑块/元件 90960
封装/外壳 1020- FBGA封装
工作温度0°C ~ 85°C
电源电压1.14 V ~ 3.465 V
无铅状态:无铅
RoHS状态:是
其他名称EP2S90F1020C5N
EP2S90F1020C5N544

EP2S90F1020C5N 资料简介
Features The Stratix II family offers the following features:
■ 15,600 to 179,400 equivalent LEs; see Table 1–1
■ New and innovative adaptive logic module (ALM), the basic
building block of the Stratix II architecture, maximizes performance
and resource usage efficiency
■ Up to 9,383,040 RAM bits (1,172,880 bytes) available without
reducing logic resources
■ TriMatrix memory consisting of three RAM block sizes to implement
true dual-port memory and first-in first-out (FIFO) buffers
■ High-speed DSP blocks provide dedicated implementation of
multipliers (at up to 450 MHz), multiply-accumulate functions, and
finite impulse response (FIR) filters
■ Up to 16 global clocks with 24 clocking resources per device region
■ Clock control blocks support dynamic clock network enable/disable,
which allows clock networks to power down to reduce power
consumption in user mode
■ Up to 12 PLLs (four enhanced PLLs and eight fast PLLs) per device
provide spread spectrum, programmable bandwidth, clock switchover,
real-time PLL reconfiguration, and advanced multiplication
and phase shifting