深圳市云迪科技有限公司 （非本站正式会员）

Overview   The EM639165 SDRAM is a high-speed CMOS synchronous DRAM containing 128 Mbits. 

It is internally configured as 4 Banks of 2M word x 16 DRAM with a synchronous interface (all signals

 are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM

 are burst oriented; accesses start at a selected location and continue for a programmed number of 

locations in a programmed sequence. Accesses begin with the registration of a BankActivate command 

which is then followed by a Read or Write command.   The EM639165 provides for programmable Read 

or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge 

function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst

 sequence. The refresh functions, either Auto or Self Refresh are easy to use.   By having a programmable 

mode register, the system can choose the most suitable modes to maximize its performance. These devices 

are well suited for applications requiring high memory bandwidth and particularly well suited to high performance

 PC applications.